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DATA SHEET
BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT
PB1005GS
REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER + PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
DESCRIPTION
The PB1005GS is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip. The PB1005GS features shrink package, fixed prescaler and supply voltage. The 30-pin plastic SSOP package is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter data. Supply voltage is 3 V. Thus, the PB1005GS can make RF block fewer components and lower power consumption. This IC is manufactured using NEC's 20 GHz fT NESATTMIII silicon bipolar process. This process uses direct silicon nitride passivation film and gold electrodes. These materials can protect the chip surface from pollution and prevent corrosion/migration. Thus, this IC realizes excellent performance, uniformity and reliability.
FEATURES
* Double conversion * Integrated RF block : fREFin = 16.368 MHz, f2ndIFout = 4.092 MHz : RF/IF frequency down-converter + PLL frequency synthesizer
* High-density surface mountable : 30-pin plastic SSOP (9.85 x 6.1 x 2.0 mm) * Needless to input counter data : fixed division internal prescaler * VCO side division * Reference division * Supply voltage * Low current consumption * Gain adjustable externally : / 200 (/ 25, / 8 serial prescaler) : /2 : VCC = 2.7 to 3.3 V : ICC = 45.0 mA TYP.@VCC = 3.0 V : Gain control voltage pin (control voltage up vs. gain down)
APPLICATION
* Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz
ORDERING INFORMATION
Part Number Package 30-pin plastic SSOP (7.62 mm (300)) Supplying Form Embossed tape 16 mm wide. Pin 1 is in tape pull-out direction. QTY 2.5 kpcs/reel.
PB1005GS-E1
Remark
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: PB1005GS) Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. P13860EJ3V0DS00 (3rd edition) Date Published April 2000 N CP(K) Printed in Japan
The mark
shows major revised points.
(c)
1998, 2000
PB1005GS
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
IF-MIXin GND (IF-MIX) RF-MIXout VCC (RF-MIX) RF-MIXin GND (RF-MIX) VCC (1stLO-OSC) 1stLO-OSC1 1stLO-OSC2 GND (1stLO-OSC) VCC (phase detector) PD-Vout3 PD-Vout2 PD-Vout1 GND (phase detector) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PD
/2 /8 /25
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
VCC (IF-MIX) VGC (IF-MIX) IF-MIXout GND (2ndIF-AMP) 2ndlFin1 2ndlFin2 2ndlFbypass VCC (2ndIF-AMP) 2ndIFout REFout VCC (reference block) REFin GND (divider block) LOout VCC (divider block)
2
Data Sheet P13860EJ3V0DS00
PB1005GS
PRODUCT LINE-UP (TA = +25C, VCC = 3.0 V)
Functions (Frequency unit: MHz) VCC (V) ICC (mA) 6 CG (dB) 14 TA (C) -40 to +85
Type General Purpose Wideband Separate IC
Part Number
Package 6-pin minimold 6-pin super minimold
Status Available
PC2756T PC2756TB PC2753GR
RF down-converter with osc. Tr 2.7 to 3.3
IF down-converter with gain control amplifier RF/IF down-converter + PLL synthesizer REF = 18.414 1stIF = 28.644/2ndIF = 1.023 RF/IF down-converter + PLL synthesizer REF = 16.368 1stIF = 61.380/2ndIF = 4.092
2.7 to 3.3
6.5
60 to 79 -20 to +85
20-pin plastic SSOP 30-pin plastic SSOP Discontinued
Clock PB1003GS Frequency Specific 1 chip IC
2.7 to 3.3
37.5
72 to 92
PB1004GS PB1005GS
2.7 to 3.3
37.5
72 to 92
-20 to +85 -40 to +85 Available
2.7 to 3.3
45.0
72 to 92
Remark
Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. To know the associated products, please refer to their latest data sheets.
SYSTEM APPLICATION EXAMPLE
GPS receiver RF block diagram
* f0 = 1.023 MHz in the diagram. 60f0 RF-MIXout LNA 1540f0 1540f0 BPF 64f0 8f0 1/25 1600f0 OSC LOOP 8f0 AMP 1stLO-OSC1 1stLO-OSC2 LOout VCC TCXO 16.368 MHz 16f0 1/8 PD 1/2 16f0 16.368 MHz Buff to Demodulator RF-MIX BPF IF-MIXin IF-MIX IF-MIXout VGC 40f0 LPF 2ndlFin1 2ndlFin2 2ndlFbypass 2ndlF-Amp 4f0 4.092 MHz Buff to Demodulator * PB1005GS is in .
1575.42 MHz from Antenna
example: PC2749TB
REF
Caution
This diagram schematically shows only the PB1005GS's internal functions on the system. This diagram does not present the actual application circuits.
Data Sheet P13860EJ3V0DS00
3
PB1005GS
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Total Circuit Current Power Dissipation Symbol VCC ICC PD TA = +25C TA = +25C Mounted on double-sided copper clad 50 x 50 x 1.6 mm epoxy glass PWB at TA = +85C Conditions Ratings 3.6 128 464 -40 to +85 -55 to +150 Unit V mA mW C C
Operating Ambient Temperature Storage Temperature
TA Tstg
RECOMMENDED OPERATING RANGE
Parameter Supply Voltage Operating Ambient Temperature RF Input Frequency 1stLO Oscillating Frequency 1stIF Input Frequency 2ndLO Input Frequency 2ndIF Input/output Frequency Symbol VCC TA fRFin f1stLOin f1stIFin f2ndLOin f2ndIFin f2ndIFout fREFin fREFout MIN. 2.7 -40 1616.80 TYP. 3.0 +25 1575.42 1636.80 61.380 65.472 4.092 MAX. 3.3 +85 1656.80 Unit V C MHz MHz MHz MHz MHz
Reference Input/output Frequency
16.368
MHz
4
Data Sheet P13860EJ3V0DS00
PB1005GS
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25C, VCC = 3.0 V)
Parameter Total Circuit Current Symbol ICCtotal Conditions ICC1 + ICC2 + ICC3 + ICC4 MIN. 32.0 TYP. 45.0 MAX. 60.0 Unit mA
RF Down-converter Block (fRFin = 1575.42 MHz, f1stLOin = 1636.80 MHz, PLOin = -10 dBm, ZL = ZS = 50 ) Circuit Current 1 RF Conversion Gain RF-SSB Noise Figure Maximum IF Output Power ICC1 CGRF NFRF PO(sat)RF No Signals PRFin = -40 dBm PRFin = -40 dBm PRFin = -10 dBm 6.0 12.5 7 -5.5 10.0 15.5 10 -2.5 14.0 18.5 13 +0.5 mA dB dB dBm
IF Down-converter Block (f1stIFIn = 61.38 MHz, f2ndLOIn = 65.472 MHz, ZS = 50 , ZL = 2 k) Circuit Current 2 IF Voltage Conversion Gain IF-SSB Noise Figure Maximum 2nd IF Output Power Gain Control Voltage Gain Control Range ICC2 CG(GV)IF NFIF PO(sat)IF No Signals at Maximum Gain, P1stIFin = -50 dBm at Maximum Gain, P1stIFin = -50 dBm at Maximum Gain, P1stIFin = -20 dBm 3.4 38 8.5 -9.5 20 5.3 41 11.5 -6.5 7.2 44 14.5 -3.5 mA dB dB dBm
VGC DGC
Voltage at Maximum Gain of CGIF P1stIFin = -50 dBm
1.0
V dB
2nd IF Amplifier (f2ndIF = 4.092 MHz, ZS = 50 , ZL = 2 k) Circuit Current 3 Voltage Gain Maximum Output Power PLL Synthesizer Block Circuit Current 4 Phase Comparing Frequency Reference Input Minimum Level Loop Filter Output Level (H) Loop Filter Output Level (L) Reference Output Swing ICC4 fPD PLL All Block Operating PLL Loop 18.5 8.0 28.5 8.184 38.5 8.4 0.4 mA MHz ICC3 GV PO(sat) No Signals P2ndIFin = -60 dBm P2ndIFin = -30 dBm 1.55 37 -14.5 2.40 40 -11.5 3.25 43 -8.5 mA dB dBm
VREFin
ZL = 10 k//20 pF (Impedance of measurement equipment)
200
mVP-P
VLP(H) VLP(L) VREFout ZL = 10 k//2 pF (Impedance of measurement equipment)
2.8 1.0
V V VP-P
Data Sheet P13860EJ3V0DS00
5
PB1005GS
STANDARD CHARACTERISTICS (Unless otherwise specified TA = +25C, VCC = 3.0 V)
Parameter Symbol Conditions Reference Unit
RF Down-converter Block (P1stLOin = -10 dBm, ZL = ZS = 50 ) LO Leakage to IF Pin LO Leakage to RF Pin Input 3rd Order Intercept Point LOif LOrf IIP3RF f1stLOin = 1636.80 MHz f1stLOin = 1636.80 MHz fRFin1 = 1600 MHz, fRFin2 = 1605 MHz f1stLOin = 1660 MHz -30 -30 -13 dBm dBm dBm
IF Down-converter Block (1stLO oscillating, ZS = 50 , ZL = 2 k) LO Leakage to 2nd IF Pin LO Leakage to 1st IF Pin Input 3rd Order Intercept Point LO2ndif LO1stif IIP3IF f2ndLOin = 65.472 MHz f2ndLOin = 65.472 MHz f1stIFin1 = 61.38 MHz, f1stIFIn2 = 61.48 MHz f2ndLOin = 65.472 MHz -20 -40 -34 dBm dBm dBm
6
Data Sheet P13860EJ3V0DS00
PB1005GS
PIN EXPLANATION
Applied Voltage (V) Pin Voltage (V) 1.68
Pin No. 3
Pin Name
Function and Application
Internal Equivalent Circuit
RX-MIXout
Output pin of RF mixer. 1st IF filter must be inserted between pin 1 & 3. Supply voltage pin of RF mixer block. This pin must be decoupled with capacitor (eg. 1 000 pF). Input pin of RF mixer. 1 575.42 MHz band pass filter can be inserted between pin 5 and external LNA. Ground pin RF mixer. Supply voltage pin of differential amplifier for 1st LO oscillator circuit. Pin 8 & 9 are each base pin of differential amplifier for 1st LO oscillator. These pins should be equipped with LC and varactor to oscillate on 1636.80 MHz as VCO. Ground pin of differential amplifier for 1st LO oscillator circuit. Supply voltage pin of phase detector and active loop filter. Pins of active loop filter for tuning voltage output. The active transistors configured with darlington pair are built on chip. Pin 14 should be pulled down with external resistor. Pin 12 to 13 should be equipped with external RC in order to adjust dumping factor and cutoff frequency. This tuning voltage output must be connected to varactor diode of 1st LO-OSC. Ground pin of phase detector + active loop filter.
4
4
VCC (RF-MIX)
2.7 to 3.3
1stLO -OSC
3
5
5
RF-MIXin
1.20
6
6 7
GND (RF-MIX) VCC (1stLO-OSC)
0 2.7 to 3.3

7
VCC RF-MIX or Prescaler input
8
1stLO-OSC1
1.88
9
1stLO-OSC2
1.88
8 10
9
10
GND (1stLO-OSC)
0
11
VCC (phase detector)
2.7 to 3.3
12
PD-Vout3
Pull-up with resistor
11
13
PD-Vout2
Output in accordance with phase difference
13 PD 12
14
PD-Vout1
Pull-up with resistor
15
14
15
GND (phase detector)
0
Data Sheet P13860EJ3V0DS00
7
PB1005GS
Applied Voltage (V) 2.7 to 3.3 Pin Voltage (V)
Pin No. 16
Pin Name
Function and Application
Internal Equivalent Circuit
VCC (divider block) LOout
Supply voltage pin of prescalers. Monitor pin of comparison frequency at phase detector. Ground pin of prescalers + LOout amplifier Input pin of reference frequency. This pin should be equipped with external 16.368 MHz oscillator (e.g. TCXO). Supply voltage pin of input/output amplifiers in reference block. Output pin of reference frequency. The frequency from pin 19 can be took out as 1 VP-P swing. Output pin of 2nd IF amplifier. This pin output 4.092 MHz clipped sinewave. This pin should be equipped with external inverter to adjust level to next stage on user's system. Supply voltage pin of 2nd IF amplifier. Bypass pin of 2nd IF amplifier input 1. This pin should be grounded through capacitor. Pin of 2nd IF amplifier input 2. This pin should be grounded through capacitor. Pin of 2nd IF amplifier input 1. 2nd IF filter can be inserted between pin 26 & 28. Ground pin of 2nd IF amplifier.
16 1st LO OSC 18
IF MIX /25 /8
PD
17
2.08
PD 17
/2 Ref.
18
GND (divider block) REFin
0
19
1.96
20
20
VCC (reference block) REFout
2.7 to 3.3
21 19 PD
21
1.65
18
22
2ndIFout
1.56
23 24 22
23
VCC (2ndIF-AMP) 2ndIF bypass
2.7 to 3.3
26
24
2.30
25
25
2ndIFin2
2.35
27
26
2ndIFin1
2.35
27
GND (2ndIF-AMP)
0
8
Data Sheet P13860EJ3V0DS00
PB1005GS
Applied Voltage (V) Pin Voltage (V) 1.15
Pin No. 28
Pin Name
Function and Application
Internal Equivalent Circuit
IF-MIXout
Output pin from IF mixer. IF mixer output signal goes through gain control amplifier before this emitter follower output port. Gain control voltage pin of IF mixer output amplifier. This voltage performs forward control (VGC up Gain down). Supply voltage pin of IF mixer, gain control amplifier and emitter follower transistor. Input pin of IF mixer. Ground pin of IF mixer.
29 30 1 2nd LO 2 28
29
VGC (IF-MIX)
0 to 3.3
30
VCC (IF-MIX)
2.7 to 3.3
1 2
IF-MIXin GND (IF-MIX)
0
2.05
Caution
Ground pattern on the board must be formed as wide as possible to minimize ground impedance.
Data Sheet P13860EJ3V0DS00
9
PB1005GS
TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25C, VCC = 3.0 V)
-IC TOTAL- -
TOTAL CIRCUIT CURRENT vs. SUPPLY VOLTAGE 80 No signals 70 60 50 40 30 20 10 0 0 1 2 3 4 TA = + 25C TA = - 40C TA = + 85C
Total Circuit Current ICCTOTAL (mA)
Supply Voltage VCC (V)
-RF DOWN-CONVERTER BLOCK- -
CIRCUIT CURRENT vs. SUPPLY VOLTAGE 12 No signals
Circuit Current ICC (mA)
10 8 6 4 2 0
0
1
2
3
4
Supply Voltage VCC (V)
1st IF OUTPUT POWER vs. RF INPUT POWER + 10
1st IF Output Power P1stIFout (dBm) 1st IF Output Power P1stIFout (dBm)
1st IF OUTPUT POWER vs. RF INPUT POWER + 10 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 RF Input Power PRFin (dBm) 0 + 10 TA = - 40 C fRFin = 1.575420 GHz f1stLOin = 1.63680 GHz P1stLOin = - 10 dBm f1stIFout = 61.38 MHz TA = + 25 C
0 - 10 - 20 - 30 - 40 - 50 - 60
fRFin = 1.575420 GHz f1stLOin = 1.63680 GHz P1stLOin = - 10 dBm f1stIFout = 61.38 MHz
VCC = 3.3 V
VCC = 3.0 V
VCC = 2.7 V
TA = + 85 C
- 70 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 RF Input Power PRFin (dBm)
0
+ 10
10
Data Sheet P13860EJ3V0DS00
PB1005GS
1st IF OUTPUT POWER vs. 1st LO INPUT POWER - 10 fRFin = 1.57542 MHz PRFin = - 40 dBm - 15 f1stLOin = 1636.8 MHz f1stIFout = 61.38 MHz - 20 - 25 - 30 - 35 - 40 - 50 - 40 - 30 VCC = 2.7 V VCC = 3.0 V VCC = 3.3 V RF CONVERSION GAIN vs. RF INPUT FREQUENCY 30 PRFin = - 40 dBm P1stLOin = - 10 dBm 25 f1stIFout = 61.38 MHz fLO = fRFin + f1stIFout VCC = 3.3 V 20 15 VCC = 2.7 V 10 5 0 VCC = 3.0 V
1st IF Output Power P1stIFout (dBm)
- 20
- 10
0
+ 10
RF Conversion Gain CGRF (dB)
0.1
0.3
1.0
2.0
1st LO Input Power P1stLOin (dBm)
RF Input Frequency fRFin (GHz)
3rd Order Intermodulation Distortion IM3 (dBm) 1st IF Output Power of Each Tone P1stIFout (each) (dBm)
RF Conversion Gain CGRF (dB)
RF CONVERSION GAIN vs. 1st IF OUTPUT FREQUENCY 30 fRFin = 1.57542 GHz PRFin = - 40 dBm 25 P1stLOin = - 10 dBm fLOin = fRFin + fIFout 20 Upper Local VCC = 3.3 V 15 10 5 0 VCC = 3.0 V VCC = 2.7 V
3rd ORDER INTERMODULATON DISTORTION, 1st IF OUTPUT POWER OF EACH TONE vs. RF INPUT POWER OF EACH TONE + 20 + 10 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 RF Input Power of Each Tone PRFin
(each)
fRFin1 = 1 600 MHz fRFin2 = 1 605 MHz f1stLOin = 1 660 MHz P1stLOin = - 10 dBm Upper Local P1stIFout
(each)
IM3
10
30
100
300
1 000
0
+ 10
1st IF Output Frequency f1stIFout (MHz)
(dBm)
-IF DOWN-CONVERTER BLOCK- -
CIRCUIT CURRENT vs. SUPPLY VOLTAGE 12 No signals
Circuit Current ICC (mA)
10 8 6 4 2 0
0
1
2
3
4
Supply Voltage VCC (V)
Data Sheet P13860EJ3V0DS00
11
PB1005GS
2nd IF OUTPUT POWER vs. 1st IF INPUT POWER 0 VCC = 3.3 V f1stIFin = 61.38 MHz - 5 f2ndLOin = 65.472 MHz - 10 P2ndLOin = - 10 dBm f2ndFout = 4.092 MHz - 15 VGC = GND - 20 - 25 - 30 - 35 - 40 - 45 - 50 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 1st IF Input Power P1stIFin (dBm) 0 VCC = 2.7 V VCC = 3.0 V 2nd IF OUTPUT POWER vs. 1st IF INPUT POWER 0
2nd IF Output Power P2ndIFout (dBm)
2nd IF Output Power P2ndIFout (dBm)
-5 - 10 - 15 - 20 - 25 - 30 - 35 - 40 - 45
f1stIFin = 61.38 MHz f2ndLOin = 65.472 MHz P2ndLOin = - 10 dBm f2ndFout = 4.092 MHz VGC = GND TA = - 40C
TA = + 85C TA = + 25C
- 50 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 1st IF Input Power P1stIFin (dBm)
0
IF CONVERSION GAIN vs. 1st IF INPUT FREQUENCY 50
IF Conversion Gain CGIF (dB) IF Conversion Gain CGIF (dB)
IF CONVERSION GAIN vs. 1st IF INPUT FREQUENCY 50 45 40 35 30 P1stIFin = - 50 dBm P2ndLOin = - 10 dBm f2ndIFout = 4.092 MHz VGC = GND 20 10 30 25 TA = + 85C TA = + 25C TA = - 40C
VCC = 3.3 V 45 VCC = 3.0 V 40 35 VCC = 2.7 V 30 25 20 P1stIFin = - 50 dBm P2ndLOin = - 10 dBm f2ndIFout = 4.092 MHz VGC = GND 10 30 50 70 100
50
70
100
1st IF Input Frequency f1stIFin (MHz)
1st IF Input Frequency f1stIFin (dBm)
IF CONVERSION GAIN vs. 2nd IF OUTPUT FREQUENCY 50
IF Conversion Gain CGIF (dB) IF Conversion Gain CGIF (dB)
IF CONVERSION GAIN vs. 2nd IF OUTPUT FREQUENCY 50 45 40 35 30 TA = + 85C TA = - 40C
45 40 35
VCC = 3.0 V
VCC = 3.3 V
TA = + 25C
VCC = 2.7 V 30 f1stIFin = 61.38 MHz P1stIFin = - 50 dBm 25 P2ndLOin = - 10 dBm f2ndIFout = f1stIFin - f2ndLOin VGC = GND 20 1 3
5
7
10
f1stIFin = 61.38 MHz P1stIFin = - 50 dBm 25 P2ndLOin = - 10 dBm f2ndIFout = f1stIFin - f2ndLOin VGC = GND 20 1 3
5
7
10
2nd IF Output Frequency f2ndIFout (MHz)
2nd IF Output Frequency f2ndIFout (MHz)
12
Data Sheet P13860EJ3V0DS00
PB1005GS
IF CONVERSION GAIN vs. GAIN CONTROL VOLTAGE 50 VCC = 3.3 V 40 30 20 10 VCC = 2.7 V 0 - 10 - 20 - 30 0 f1stIFin = 61.38 MHz P1stIFin = - 50 dBm f2ndLOin = 65.472 MHz P2ndLOin = - 10 dBm f2ndIFout = 4.092 MHz 0.5 1 1.5 2 2.5 3 VCC = 3.0 V IF CONVERSION GAIN vs. GAIN CONTROL VOLTAGE 50 TA = - 40C
IF Conversion Gain CGIF (dB)
IF Conversion Gain CGIF (dB)
40 30 20 10 0 - 10 - 20 - 30 0 f1stIFin = 61.38 MHz P1stIFin = - 50 dBm f2ndLOin = 65.472 MHz P2ndLOin = - 10 dBm f2ndIFout = 4.092 MHz 0.5 1 1.5 2 2.5 3 TA = + 85C TA = + 25C
Gain Control Voltage VGC (V)
Gain Control Voltage VGC (V)
3rd ORDER INTERMODULATION DISTORTION, 2nd IF OUTPUT POWER OF EACH TONE vs. 2nd IF INPUT POWER OF EACH TONE
3rd Order Intermodulation Distortion IM3 (dBm) 2nd IF Output Power of Each Tone P2ndIFout (each) (dBm)
0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 - 90 - 100 - 80 - 70 - 60 - 50 f1stIFin1 = 61.38 MHz f1stIFin2 = 61.48 MHz f2ndLOin = 65.472 MHz P2ndLOin = - 10 dBm VGC = GND - 40 - 30
(each)
P2ndIFout
(each)
IM3
- 20 (dBm)
2nd IF Input Power of Each Tone P1stIFin
-IF AMPLIFIER BLOCK- -
CIRCUIT CURRENT vs. SUPPLY VOLTAGE 4 No signals
Circuit Current ICC (mA)
3
2
1
0
0
1
2
3
4
Supply Voltage VCC (V)
Data Sheet P13860EJ3V0DS00
13
PB1005GS
2nd IF OUTPUT POWER vs. 2nd IF INPUT POWER + 10 f2ndIFin = 4.092 MHz RL = 2 k 0 VCC = 3.3 V VCC = 3.0 V - 10 - 20 VCC = 2.7 V - 30 - 40 - 50 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 2nd IF Input Power P2ndIFin (dBm) 2nd IF OUTPUT POWER vs. 2nd IF INPUT POWER + 10 f2ndIFin = 4.092 MHz RL = 2 k 0 TA = - 40C - 10 - 20 - 30 - 40 - 50 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 2nd IF Input Power P2ndIFin (dBm) TA = + 25C TA = + 85C
2nd IF Output Power P2ndIFout (dBm)
2nd IF Output Power P2ndIFout (dBm)
0
0
VOLTAGE GAIN vs. INPUT FREQUENCY 42 41
Voltage Gain GV (dB) Voltage Gain GV (dB)
VOLTAGE GAIN vs. INPUT FREQUENCY 42 41 P2ndIFin = - 60 dBm RL = 2 k TA = + 25C TA = - 40C
P2ndIFin = - 60 dBm RL = 2 k VCC = 3.0 V VCC = 3.3 V
40 39 VCC = 2.7 V 38 37 36
40 39 38 37 36
TA = + 85C
0.1
1
10
100
0.1
1
10
100
Input Frequency fin (MHz)
Input Frequency fin (MHz)
-PLL SYNTHESIZER BLOCK- -
CIRCUIT CURRENT vs. SUPPLY VOLTAGE 40 No signals
Circuit Current ICC (mA)
30
20
10
0
0
1
2
3
4
Supply Voltage VCC (V)
14
Data Sheet P13860EJ3V0DS00
PB1005GS
-REFERENCE BLOCK- -
REFERENCE OUTPUT SWING vs. REFERENCE INPUT FREQUENCY
Reference Output Swing VREFout (VP-P)
REFERENCE OUTPUT SWING vs. REFERENCE INPUT FREQUENCY
Reference Output Swing VREFout (VP-P)
2.0 PREFin = 1.0VP-P
2.0 PREFin = 1.0VP-P
1.5 VCC = 3.0 V 1.0
VCC = 3.3 V
1.5
TA = + 25C
TA = - 40C
1.0 TA = + 85C 0.5
VCC = 2.7 V 0.5
0
1
10 Reference Input Frequency fREFin (MHz)
100
0
1
10 Reference Input Frequency fREFin (MHz)
100
REFERENCE OUTPUT SWING vs. REFERENCE INPUT POWER
Reference Output Swing VREFout (VP-P)
REFERENCE OUTPUT SWING vs. REFERENCE INPUT POWER
Reference Output Swing VREFout (VP-P)
2.0 fREFin = 16.368 MHz
2.0 fREFin = 16.368 MHz
1.5 VCC = 3.0 V 1.0 VCC = 2.7 V 0.5 VCC = 3.3 V
1.5
TA = - 40C
TA = + 25C
1.0 TA = + 85C 0.5
0 - 50
- 40
- 30
- 20
- 10
0
+ 10
0
- 50
- 40
- 30
- 20
- 10
0
+ 10
Reference Input Power PREFin (dBm)
Reference Input Power PREFin (dBm)
Remark
The graphs indicate nominal characteristics.
Data Sheet P13860EJ3V0DS00
15
PB1005GS
TEST CIRCUIT
Signal Generator 50 C1 1 30 C23 2 C2 3 VCC Signal Generator 50 5 C4 6 7 C5 R1 V-Di C6 9 C7 R2 10 21 C15 11 C8 R3 12 C9 R4 C10 13 18 PD /2 19 C13 50 Signal Generator Spectrum Analyzer or Oscilloscope 20 C14 VCC Spectrum Analyzer /8 22 R5 8 23 /25 25 C19 VCC 24 C18 C17 C16 VCC Spectrum Analyzer or Oscilloscope 26 C20 Signal Generator C3 50 28 R6 4 27 29 C22 C21 VCC To get maximum gain, apply 1.0V MAX. Spectrum Analyzer 1PIN
Spectrum Analyzer 50
VCC
14
17 C12
15
16 C11
VCC
Spectrum Analyzer: measure frequency Oscilloscope : measure output voltage swing
Component List
Form Chip capacitor Symbol C1 to C5, C8, C11 to C15, C17, C18, C22 C6, C7 C9 C10 C19 C23 Ceramic capacitor C16, C20 C21 Chip resistor R1, R2 R3 R4 R5, R6 Varactor Diode Chip inductor V-Di L Value 1 000 pF 24 pF (UJ) 1 800 pF 33 nF 10 000 pF 1 F 0.1 F 0.01 F 4.7 k 6.2 k 1.2 k 1.95 k HVU12 2.7 nH
16
Data Sheet P13860EJ3V0DS00
PB1005GS
PACKAGE DIMENSIONS
30 PIN PLASTIC SHRINK SOP (300 mil) (UNIT: mm)
30 16 detail of lead end
3 +7 -3
1 2.0 MAX. 1.7 0.1
9.85 0.26
15 8.1 0.2 6.1 0.2 1.0 0.2
0.5 0.2 0.65 0.3 0.1 0.125 0.075 NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition. 0.10 M 0.10 0.51 MAX. 0.15 +0.10 -0.05
Data Sheet P13860EJ3V0DS00
17
PB1005GS
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent abnormal oscillation). (3) Keep the track length of the ground pins as short as possible. (4) Connect a bypass capacitor (example: 1 000 pF) to the VCC pin. (5) Frequency signal input/output pins must be each coupled with capacitor for DC cut.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative.
Soldering Method Infrared Reflow Soldering Conditions Package peak temperature: 235C or below Time: 30 seconds or less (at 210C) Note Count: 3, Exposure limit: None Package peak temperature: 215C or below Time: 40 seconds or less (at 200C) Note Count: 3, Exposure limit: None Soldering bath temperature: 260C or below Time: 10 seconds or less Note Count: 1, Exposure limit: None Pin temperature: 300C Time: 3 seconds or less (per side of device) Note Exposure limit: None Recommended Condition Symbol IR35-00-3
VPS
VP15-00-3
Wave Soldering
WS60-00-1
Partial Heating
-
Note After opening the dry pack, keep it in a place below 25C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
18
Data Sheet P13860EJ3V0DS00
PB1005GS
[MEMO]
Data Sheet P13860EJ3V0DS00
19
PB1005GS
ATTENTION
OBSERVE PRECAUTIONS FOR HANDLING
ELECTROSTATIC SENSITIVE DEVICES
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
* The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. * NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. * Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. * While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. * NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance.
M7 98. 8

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